How can a branch instruction be mispredicted AND retired?

user997112

Intel has a hardware event counter called:

BR_MISP_RETIRED.ALL_BRANCHES

where the description says:

Mispredicted macro branch instructions retired.

But retired instructions are those which were correctly-required:

Modern processors execute much more instructions that the program flow needs. This is called "speculative execution".

Then the instructions that were "proven" as indeed needed by flow are "retired".

https://software.intel.com/en-us/forums/topic/311170

So how can a branch misprediction instruction be proven-as-needed, too?

gsg

Out of order machines work by speculating past multiple branches at the same time. When a branch is found to have been wrongly predicted the CPU will clean up any unwanted state and return execution to that instruction so that the correct path can be taken.

So while many speculatively executed instructions (including branches) are discarded, the single instruction that causes the mispredicted branch is not. That branch instruction takes effect and is retired, after having being mispredicted.

This counter seems to record such instructions.

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